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36 Specification Update

BU52. Instructions Retired Event May Over Count Execution of IRET

Instructions

Problem: Under certain conditions, the performance monitoring event Instructions Retired (Event

C0H, Unmask 00H) may over count the execution of IRET instruction.

Implication: Due to this erratum, performance monitoring event Instructions Retired may over

count.

Workaround: None identified.

Status: For the steppings affected, see the Summary Tables of Changes.

BU53. PCIe* Link May Unexpectedly Exit Loopback State

Problem: The PCIe Port is capable of functioning as 3 independent PCIe controllers. Due to this

erratum, if more than one of the controllers is in Loopback.Active state and configured

as a loopback slave and if any one of these controllers transition to Loopback.Exit, all

controllers in Loopback.Active will transition to Loopback.Exit.

Implication: Loopback.Active state on a given Link may unexpectedly exit. Software should avoid

configuring more than one of the PCIe Controllers as Loopback slave concurrently.

Workaround: PCIe endpoints should avoid configuring more than one of PCIe Controllers as Loopback

slave.

Status: For the steppings affected, see the Summary Tables of Changes.

BU54. The RDRAND Instruction Will Not Execute as Expected

Problem: On processors that support the RDRAND instruction, that capability should be reported

via the setting of CPUID.01H:ECX.RDRAND[bit 30]. Due to this erratum, that bit will

not be set, and the execution of the RDRAND instruction will result in a #UD exception.

Implication: Software will not be able to utilize the RDRAND instruction

Workaround: It is possible for the BIOS to contain a workaround for this erratum to report RDRAND

as present via CPUID and allow proper execution of RDRAND.

Status: For the steppings affected, see the Summary Tables of Changes.

BU55. A PCIe* Device That Initially Transmits Minimal Posted Data Credits

May Cause a System Hang

Problem: Under certain conditions, if a PCIe device that initially transmits posted data credits

less than Max_Payload_Size/16 + 4 (16B/4DW is unit of data flow control) and is the

target of a Peer-to-Peer write of Max_Payload_Size, the system may hang due to

Posted Data credit starvation.

Implication: Under certain conditions, the processor may encounter a Posted Data credit starvation

scenario and hang.

Workaround: A BIOS code change has been identified and may be implemented as a workaround for

this erratum.

Status: For the steppings affected, see the Summary Tables of Changes.

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Intel I5 Manuel d'utilisateur Page 36