Intel SR1640THNA Fiche technique Page 64
- Page / 122
- Table des matières
- MARQUE LIVRES
- Revision 1.0 1
- March 2010 1
- Revision History 2
- Disclaimers 3
- Table of Contents 4
- List of Figures 7
- List of Tables 9
- Revision 1.0 10
- 1. Introduction 13
- 2. Functional Architecture 14
- 2.1 System Views 16
- 2.2 System Dimensions 17
- 2.3 System Components 18
- 2.4 Server Board Overview 19
- 2.4.2 Processor sub-system 20
- 2.4.3 Memory Subsystem 21
- Channel A Channel B 24
- A1 A2 B1 B2 24
- 2.4.4 Intel 27
- 3420 PCH 27
- 2.4.5 I/O Sub-system 27
- Integrated BMC Block Diagram 30
- 2.4.7 Video Support 31
- 2.4.9 Intel 32
- 2.5 Platform Management 33
- Revision 1.0 23 35
- 2.6 BIOS User Interface 37
- 2.6.3 BIOS Setup utility 38
- 2.6.4 Operation 38
- Revision 1.0 27 39
- Revision 1.0 29 41
- 43
- 2.6.5.2.2 Memory Screen 45
- Performance screen 45
- Revision 1.0 39 51
- Available Hard Disks > 58
- CDROM #1 59
- CDROM #2 59
- Floppy Disk #1 59
- Floppy Disk #2 59
- Network Device #1 60
- Network Device #2 60
- 2.6.6 Loading BIOS Defaults 63
- 2.7.2 Board Jumpers 68
- 2.8 System IO feature 71
- 3. Power Sub-System 73
- 3.3 Efficiency 74
- 3.4.2 Input current 75
- Revision 1.0 65 77
- Table 59. DC output rating 77
- 3.6 Protection Circuits 79
- 3.7 SMBus communication 80
- 3.8.1 Hardware 81
- 3.9 FRU data format 82
- 3.10 AC Inlet Connector 83
- 4. Cooling Sub-System 84
- 4.2 Three-Fan Module 85
- 4.3 Power Supply Fan 85
- 4.4 Air Duct Module 85
- 5. Hard Disk Drive Support 87
- 6.1 Control Panel Button 89
- 6.2.1 Power / Sleep LED 90
- 6.2.2 System Status LED 90
- Revision 1.0 79 91
- State LED State 92
- Off Off 92
- 7. Configuration Jumpers 93
- Steps for clearing the CMOS 95
- Revision 1.0 89 101
- 인증번호: CPU-SR1640 (A) 101
- 8.10 Other Markings 104
- Revision 1.0 93 105
- Made in China 105
- Revision 1.0 97 109
- MSB LSB 111
- Revision 1.0 101 113
- Appendix D: POST Code Errors 114
- POST Error Beep Codes 117
- Glossary 119
- Revision 1.0 109 121
- Reference Documents 122
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