Intel RS3SC008 Fiche technique télécharger pdf (Page 40)

Intel

82599 10 GbE Controller—Errata

Workaround:

If a system is requested to operate under this specific scenario, a custom EEPROM image can be

provided to clear the WUS register each time it is set.

Note: A custom EEPROM image can be provided to workaround this issue. To obtain a custom

EEPROM image, contact your Intel representative.

Status: B0=Yes; NoFix

40 PME_Status Might Fail to Report a Wake-Up Event

Problem:

During a wake-up event, the PME_Status bit is set in both PMCSR and WUC registers.

When waking up from Dr State, an error condition might happen and the PME_Status bit is reset by

hardware.

Implication:

The BIOS and/or operating system cannot detect what device asserted the PME.

Workaround:

A custom EEPROM image can be provided that sets the PME_Status bit after waking up from Dr State.

Status: B0=Yes; NoFix

Note: A custom EEPROM image can be provided to workaround this issue. To obtain a custom

EEPROM image, contact your Intel representative.

41 DMA: QBRC and VFGORC Counters Might Get

Corrupted if Receiving a Packet Bigger Than 12 KB

Problem:

DMA-Rx statistics Queue Bytes Received Counter (QBRC[n]) and VF Good Octets Received Counter

VFGORC[n]) might get corrupted in a rare case of Rx aggregating of descriptors for packets with overall

size bigger than 16 KB. This occurs only if the first aggregated packets are smaller than 4 KB and the

last aggregated packet of the same transaction is bigger than 12 KB.

Implication:

In a rare usage model of receiving 12 KB jumbo packets, QBRC[n] and VFGORC[n] might return a false

value.

Workaround:

None.

Status: B0=Yes; NoFix

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Intel RS3SC008 Fiche technique Page 40