Intel BX80623I32100 Fiche technique Page 5
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- Table des matières
- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
Datasheet, Volume 1 5
4.2.5.1 Package C0 .............................................................................. 51
4.2.5.2 Package C1/C1E ....................................................................... 51
4.2.5.3 Package C3 State...................................................................... 52
4.2.5.4 Package C6 State...................................................................... 52
4.3 Integrated Memory Controller (IMC) Power Management ........................................52
4.3.1 Disabling Unused System Memory Outputs ................................................ 52
4.3.2 DRAM Power Management and Initialization ............................................... 53
4.3.2.1 Initialization Role of CKE ............................................................ 54
4.3.2.2 Conditional Self-Refresh............................................................. 54
4.3.2.3 Dynamic Power-down Operation ................................................. 55
4.3.2.4 DRAM I/O Power Management .................................................... 55
4.4 PCI Express* Power Management ........................................................................ 55
4.5 Direct Media Interface (DMI) Power Management .................................................. 55
4.6 Graphics Power Management .............................................................................. 56
4.6.1 Intel
®
Rapid Memory Power Management (Intel
®
RMPM)
(also known as CxSR) ............................................................................. 56
4.6.2 Intel
®
Graphics Performance Modulation Technology (Intel
®
GPMT) ..............56
4.6.3 Graphics Render C-State ......................................................................... 56
4.6.4 Intel
®
Smart 2D Display Technology (Intel
®
S2DDT) .................................. 56
4.6.5 Intel
®
Graphics Dynamic Frequency.......................................................... 57
4.7 Thermal Power Management ............................................................................... 57
5 Thermal Management ..............................................................................................59
6 Signal Description ................................................................................................... 61
6.1 System Memory Interface Signals........................................................................ 62
6.2 Memory Reference and Compensation Signals .......................................................63
6.3 Reset and Miscellaneous Signals.......................................................................... 64
6.4 PCI Express*-Based Interface Signals .................................................................. 65
6.5 Intel
®
Flexible Display Interface (Intel
®
FDI) Signals ............................................. 65
6.6 Direct Media Interface (DMI) Signals.................................................................... 66
6.7 Phase Lock Loop (PLL) Signals ............................................................................ 66
6.8 Test Access Points (TAP) Signals ......................................................................... 66
6.9 Error and Thermal Protection Signals ................................................................... 67
6.10 Power Sequencing Signals .................................................................................. 67
6.11 Processor Power Signals ..................................................................................... 68
6.12 Sense Signals ................................................................................................... 68
6.13 Ground and Non-Critical to Function (NCTF) Signals ............................................... 68
6.14 Processor Internal Pull-Up / Pull-Down Resistors.................................................... 69
7 Electrical Specifications ........................................................................................... 71
7.1 Power and Ground Lands.................................................................................... 71
7.2 Decoupling Guidelines ........................................................................................ 71
7.2.1 Voltage Rail Decoupling........................................................................... 71
7.3 Processor Clocking (BCLK[0], BCLK#[0]) .............................................................. 72
7.3.1 Phase Lock Loop (PLL) Power Supply......................................................... 72
7.4 V
CC
Voltage Identification (VID) .......................................................................... 72
7.5 System Agent (SA) VCC VID ............................................................................... 76
7.6 Reserved or Unused Signals................................................................................ 76
7.7 Signal Groups ................................................................................................... 77
7.8 Test Access Port (TAP) Connection....................................................................... 78
7.9 Storage Conditions Specifications ........................................................................ 79
7.10 DC Specifications .............................................................................................. 80
7.10.1 Voltage and Current Specifications............................................................ 80
7.11 Platform Environmental Control Interface (PECI) DC Specifications........................... 86
7.11.1 PECI Bus Architecture ............................................................................. 86
7.11.2 DC Characteristics .................................................................................. 87
- Datasheet, Volume 1 1
- 2 Datasheet, Volume 1 2
- Contents 3
- 4 Datasheet, Volume 1 4
- Datasheet, Volume 1 5 5
- 6 Datasheet, Volume 1 6
- Datasheet, Volume 1 7 7
- Revision History 8
- 1 Introduction 9
- Introduction 10
- 1.1 Processor Feature Details 11
- 1.2 Interfaces 11
- 1.2.2 PCI Express* 12
- Datasheet, Volume 1 13 13
- 1.2.5 Processor Graphics 14
- 1.2.6 Intel 14
- 1.3 Power Management Support 15
- 1.5 Package 16
- 1.6 Terminology 16
- 1.7 Related Documents 18
- 2 Interfaces 19
- Interfaces 20
- 2.1.3.1 Single-Channel Mode 21
- Flex Memory Technology Mode 21
- 2.1.5.2 Command Overlap 23
- 2.2 PCI Express* Interface 24
- 2.2.1.1 Transaction Layer 25
- 2.2.1.2 Data Link Layer 25
- 2.2.1.3 Physical Layer 25
- 2.2.3 PCI Express* Port 26
- 2.3.1 DMI Error Flow 27
- 2.3.3 DMI Link Down 28
- 2.4.1.2 3D Pipeline 29
- 2.4.1.3 Video Engine 30
- 2.4.1.4 2D Engine 30
- 2.4.2.1 Display Planes 31
- 2.4.3 Intel 32
- 2.6 Interface Clocking 33
- 3 Technologies 35
- Technologies 36
- Datasheet, Volume 1 37 37
- 3.4 Intel 39
- Turbo Boost Technology 39
- 3.6.1 PCLMULQDQ Instruction 40
- Datasheet, Volume 1 41 41
- 4 Power Management 43
- (ACPI) States Supported 44
- 4.2.1 Enhanced Intel 46
- SpeedStep 46
- Technology 46
- 4.2.2 Low-Power Idle States 46
- 4.2.4 Core C-states 48
- 4.2.4.2 Core C1/C1E State 49
- 4.2.4.3 Core C3 State 49
- 4.2.4.4 Core C6 State 49
- 4.2.4.5 C-State Auto-Demotion 49
- 4.2.5 Package C-States 50
- 4.2.5.1 Package C0 51
- 4.2.5.2 Package C1/C1E 51
- Management 52
- Datasheet, Volume 1 53 53
- Power Management 53
- Datasheet, Volume 1 55 55
- 4.6 Graphics Power Management 56
- 4.7 Thermal Power Management 57
- 5 Thermal Management 59
- Thermal Management 60
- 6 Signal Description 61
- Signal Description 62
- 6.5 Intel 65
- 6.10 Power Sequencing Signals 67
- 6.11 Processor Power Signals 68
- 6.12 Sense Signals 68
- 7 Electrical Specifications 71
- Voltage Identification (VID) 72
- Electrical Specifications 74
- 7.5 System Agent (SA) VCC VID 76
- 7.7 Signal Groups 77
- 7.10 DC Specifications 80
- (Sheet 2 of 2) 81
- Specifications 82
- DC Specifications 86
- 7.11.2 DC Characteristics 87
- 8 Processor Pin and Signal 89
- 90 Datasheet, Volume 1 90
- Datasheet, Volume 1 91 91
- 92 Datasheet, Volume 1 92
- Datasheet, Volume 1 93 93
- 108 Datasheet, Volume 1 108
- 9 DDR Data Swizzling 109
- Table – Channel A 110
- Table – Channel B 111
- DDR Data Swizzling 112
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IKEA RENLIGFWM8 50309643 manuali
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Ikea RENLIGFWM8 50309643 Manuale Utente (60 pagine)
Marchio: Ikea | Categoria: Washing machines | Dimensione: 1.04 MB |
Indice
FRANÇAIS 10
10
FRANÇAIS 11
11
Réglages
12
FRANÇAIS 12
12
FRANÇAIS
13
FRANÇAIS 14
14
FRANÇAIS 16
16
Programmes
16
FRANÇAIS 17
17
FRANÇAIS 18
18
FRANÇAIS 19
19
Conseils
20
FRANÇAIS 20
20
FRANÇAIS 22
22
FRANÇAIS 24
24
FRANÇAIS 25
25
FRANÇAIS 26
26
FRANÇAIS 27
27
FRANÇAIS 28
28
ITALIANO
32
ITALIANO 33
33
ITALIANO 35
35
ITALIANO 36
36
ITALIANO 37
37
ITALIANO 38
38
ITALIANO 39
39
Impostazioni
40
ITALIANO 40
40
ITALIANO 41
41
Programmi
44
ITALIANO 44
44
ITALIANO 45
45
ITALIANO 46
46
ITALIANO 47
47
ITALIANO 48
48
ITALIANO 49
49
ITALIANO 51
51
ITALIANO 52
52
ITALIANO 53
53
Dati tecnici
54
ITALIANO 54
54
ITALIANO 55
55
AA-1624346-1
60
Ikea RENLIGFWM8 50309643 Manuale Utente (60 pagine)
Marchio: Ikea | Categoria: Washing machines | Dimensione: 1.04 MB |
Indice
Contents
4
ENGLISH 10
10
Settings
11
Daily Use
11
ENGLISH 11
11
Programmes
14
ENGLISH 14
14
ENGLISH 15
15
ENGLISH 16
16
ENGLISH 17
17
ENGLISH 18
18
ENGLISH 19
19
ENGLISH 21
21
ENGLISH 22
22
ENGLISH 23
23
ENGLISH 24
24
ENGLISH 25
25
DEUTSCH 31
31
DEUTSCH 32
32
Bedienfeld
33
DEUTSCH 33
33
DEUTSCH 34
34
DEUTSCH 35
35
DEUTSCH 36
36
DEUTSCH 37
37
Programme
40
DEUTSCH 40
40
DEUTSCH 41
41
DEUTSCH 42
42
DEUTSCH 43
43
DEUTSCH 44
44
DEUTSCH 46
46
Fehlersuche
48
DEUTSCH 48
48
DEUTSCH 49
49
DEUTSCH 50
50
DEUTSCH 51
51
UMWELTTIPPS
52
DEUTSCH 52
52
DEUTSCH 55
55
AA-1624329-1
60
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