
Shield pin configuration
2.3 Pin function multiplexing control (detailed)
Table 4 lists the GPIO outputs dedicated to pin multiplexing control. Different functions may be selected for
specific shield I/O pins by setting these GPIO outputs to 0/1 (low/high). Additionally, some of the SoC GPIO pins
also feature internal mux options. These are listed as “SoC Pin Modes”.
Currently, these are configured by setting the required pin mode for the corresponding SoC GPIO pin N, via
/sys/kernel/debug/gpio_debug/gpioN/current_pinmux, to “mode[0/1/2/...]”
Table 4 Pin function multiplexing control
Shiel
d pin
GPIO pin mux SoC pin modes
Pin Linux 0 (low) 1 (high) Power-on default Pin Linux 0 1 2
-
GP130
130
GPIO
UART
- GP129 129 GPIO UART
- GP13 13 GPIO PWM
- GP182 182 GPIO PWM
IO10
U34_ IO1.7 263 PWM4_OUT
Pulled down input GP41 41 GPIO I2S
SSP5_FS_1
IO11
1
IO12
U16_ IO1.2
242
GP42
SSP5_RXD
Pulled up input
IO13
U17_ IO0.1
201
GP45
A1
Pulled up input
1
GP45
45
GPIO
IO16
U17_ IO0.2
202
GP46
Pulled up input
GP46
46
GPIO
IO18
IO19
U17_ IO0.5
205
A5
Pulled up input
1
I2C-6
I2C-8
1. These pins are pulled up inputs at power-on. This effectively enables the mux switches (i.e. mux function 1 is selected).
Intel® Edison Kit for Arduino*
Hardware Guide December 2014
10 Document Number: 331191-004
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